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This technology is a Matlab model of the Consultative Committee for Space Data Systems (CCSDS) Optical Communications High Photon Efficiency downlink transmit waveform. The model implements the CCSDS 141.1-R-1-v10 Draft Red Book from April 25, 2018. This includes a data source, transfer frame synchronization marker attachment, slicer, randomizer, cyclic redundancy check, termination bit attachment, convolutional encoder, code interleaver, accumulator, pulse position modulation (PPM) symbol mapper, channel interleaver, codeword sync marker attachment, symbol repeater, slot mapper, and guard slot insertion. The model can be used to verify FPGA implementations of the CCSDS standard.

Developed using platform-independent language, this interface converter packet allows already-existing EGSE equipment to be supported on Windows and UNIX operating systems. The software is set up and controlled using XML-formatted files that define interface connections and data content.

The Solenoid Inductance Calculator can be used to compute the inductance approximation of a cylindrical solenoid of arbitrary dimensions. The technology's calculation method (1) uses magnetic vector potential to provide a more precise estimate of inductance and (2) is not limited to a specific range of coil geometry values.

The Capture Test Waveform is a software application designed for space-based reconfigurable radios. The innovation allows snapshots of a radio's receiver environment for any number of objectives, such as interference mitigation or radio frequency mapping. Digital samples are acquired and stored in the radio's memory for processing, be that on-board the spacecraft or after download to the ground. The application is labeled "Test waveform" because it does not perform any standard communication link functions, such as carrier recovery or demodulation. Depending on the radio's resources and architecture, this application could be run in parallel with a standard communications link waveform application. (STRS)

The Electrical Modeling and Thermal Analysis Toolbox (EMTAT) is a MATLAB/Simulink based building block graphical tool used to create simulations of electrical/power systems. EMTAT is specifically designed to simulate electric/electrified propulsion systems at the level of fidelity (time scale) appropriate to capture the interaction with turbomachinery. EMTAT contains blocks that represent electrical components (batteries, motors/generators, inverters, etc.) modeled using either power flow or physics based representations. EMTAT is compatible with the Toolbox for the Modeling and Analysis of Thermodynamic Systems (T-MATS) for simulations that require mechanical components (turbomachinery, shafts, propellers, etc.). For such mixed simulations (i.e., those containing both electrical components and turbomachinery), the EMTAT blocks can use the T-MATS solver, allowing the relevant electrical and mechanical variables to be solved simultaneously.

This technology is a VHDL and Verilog implementation of the Consultative Committee for Space Data Systems (CCSDS) Optical Communications High Photon Efficiency Telemetry Signaling waveform. The CCSDS 142.0-B-1 Blue Book from August 2019 is implemented. The implementation includes a data source, transfer frame synchronization marker attachment, slicer, randomizer, cyclic redundancy check, termination bit attachment, convolutional encoder, code interleaver, accumulator, pulse position modulation (PPM) symbol mapper, channel interleaver, codeword sync marker attachment, symbol repeater, slot mapper, and guard slot insertion.

Providing a toolbox of functionality for MATLAB, this NASA-developed software detects precursor wiring faults (e.g., chafing) in shielded impedance-controlled cabling using measurements from off-the-shelf, time-domain reflectometry or vector-network analyzer hardware. The technology combines high-fidelity analytical physics models for signal propagation with fast Bayesian inference algorithms for intrinsic cable and fault-parameter retrieval.

The STRS Reference Implementation is a demonstration of the STRS architecture. The STRS Architecture Standard for software defined radios (SDRs) is an open architecture for NASA space and ground radios. The STRS standard provides a common, consistent framework to develop, qualify, operate and maintain complex reconfigurable and reprogrammable radio systems. The STRS Reference Implemenation allows verification of capabilities and provides lessons learned for the improvement of the STRS Architecture Standard 1.02.

The innovation is FPGA VHDL code written as part of the iPAS STRS Radio development. The purpose of the FPGA design is the implementation of the signal processing functions of the STRS radio architecture in the IPAS RAICs platform. The FPGA design will consist of two parts the FPGA wrapper and the test waveform. The FPGA wrapper implements each platform interface: Ethernet communication to the embedded processor for commanding and data streaming Digital-to Analog Converter (DAC) and Analog-to-digital converter (ADC) interface to the RF board RF Board Control and Configuration FPGA Clocking The test waveform does not fully implement all the signal processing functionality for a radio, but it exercises and demonstrates each interface in the FPGA wrapper. A future user of the platform for an STRS radio, would use the FPGA wrapper and replace the test waveform with their own radio signal processing functions. The FPGA design receives and processes commands and provides command control and data to the test waveform. It also receives and transmits streaming data from/to the embedded processor. The test waveform demonstrates each FPGA wrapper interface. To test transmit-side streaming, it can perform bit error rate testing on transmit-side PRBS streaming data. It can also generate PRBS streaming data packets for a receive-side streaming data source. The test waveform generates sine waves for the in-phase (I) and quadrature (Q) inputs to the RF transceiver. A BPSK modulator is included to modulate PRBS data from with the PRBS generator or from transmit-side streaming data. Captured I and Q samples from the RF transceiver can be streamed to the embedded processor where it can be plotted (if a sine wave) or bit error rate checked (if PRBS data) to demonstrate proper functionality of the RF board and its interfaces.