NASA Universal Asynchronous Receiver Transmitter (UART) Intellectual Property (IP) and VHDL Code(MSC-27118-1)
electronics and electrical power
NASA Universal Asynchronous Receiver Transmitter (UART) Intellectual Property (IP) and VHDL Code
The NASA_UART_Example is an Aldec Active-HDL project that contains the Intellectual Property (IP) files for a NASA developed Universal Asynchronous Receiver Transmitter (UART) and supporting files to implement an example of using the UART IP. The source files are a combination of Active-HDL block diagrams, Active-HDL state machines, and VHDL code. The block diagram and state machines compile down to VHDL code. All the source and compiled VHDL files are provided.
Notes: Secure email from Repository for software download
Electronics and Electrical Power
U.S. Release Only
No operating system and is not software. VHDL source for integration on an FPGA.
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